The Northwest Logic DSI-2 controller core is a second-generation MIPI DSI core optimized for high performance, low power and small size. The core is fully compliant with the DSI-2 standard and implements all three layers defined therein: Pixel to Byte Packing, Low Level Protocol, and Lane Management.
Multi-Protocol Engines Brochure
Multi-Protocol Engine IPs offer acceleration of IPsec, MACsec, SSL/TLS/DTLS, sRTP and basic hash-crypto in architectures ranging from the look-aside engines to the more sophisticated, powerful inline packet engines.
FIPS Security Toolkit Brochure
Inside Secure FIPS Security Toolkit provides the professional tools you need to secure your devices and applications. It allows you to deploy high security consistently across platforms without re-designing the security architecture or modifying every application.
TLS Toolkit Brochure
TLS Toolkit is a TLS protocol implementation in C language with minimalistic system dependencies making it easily portable on any platform. Inside’s TLS Toolkit powers millions of products ranging from embedded devices with very limited capabilities to high-end network equipment.
Multi-Channel Engine MACsec-IP-163/164
The Rambus MACsec Engine supports use cases ranging from in-line encryption for single channel 1 Gbps Ethernet to 800 Gbps multi-channel Ethernet and FlexE. The MACsec-IP-164 is a high-performance MACsec frame processing engine that provides complete MACsec SecY frame transformation for multiple channels and virtual ports. It works with the MACsec-IP-163, a virtual port matching classifier, for a complete MACsec processing data path solution.
Enflame Technology Selects Rambus HBM2 Memory Subsystem Solution For Next-Generation AI Training Chip
Highlights:
- Comprehensive HBM Gen 2 (HBM2) memory subsystem solution consisting of PHY and digital controller delivers high bandwidth and low latency with minimal form factor and power envelope
- HBM2 IP provides 2Tb/s of memory bandwidth, making it the perfect fit for Enflame Technology’s cloud AI training products
- Broad suite of supporting services simplifies 2.5D integration and design with subsystem interoperability, silicon interposer and package reference designs, and signal and power integrity (SI/PI) analysis
SUNNYVALE, Calif. – Dec. 11, 2019 – Rambus Inc. (NASDAQ: RMBS) a premier silicon IP and chip provider making data faster and safer, today announced that Enflame (Suiyuan) Technology has selected Rambus HBM2 PHY and Memory Controller IP for its next-generation AI training chip. Rambus memory interface IP enables the development of high-performance, next-generation hardware for leading-edge AI applications.
“Artificial intelligence training requires far greater memory bandwidth than standard compute applications. Rambus’ proven HBM2 memory subsystem IP delivers the ultra-high bandwidth performance our AI chips need,” said Arthur Zhang, COO of Enflame Technology. “Using Rambus interface IP cores, we are revolutionizing what’s possible in AI technology.”
Optimized for low-latency and high-bandwidth memory applications, the Rambus HBM2 interface solution delivers maximum performance and flexibility in minimal form factor and power envelope. The comprehensive HBM2 subsystem solution of PHY and memory controller provides 2Tb/s of bandwidth, making it the perfect fit for Enflame Technology’s cloud AI training needs. Complementing this interface IP, Rambus provides silicon interposer and package reference designs, and supports signal and power integrity (SI/PI) analysis.
“Enflame Technology’s repeat choice of Rambus showcases our HBM2 PHY and memory controller IP as the ideal solution for complex neural network-based AI and machine learning chips,” said Hemant Dhulla, vice president and general manager of IP Cores at Rambus. “Our HBM portfolio of solutions already in volume production deliver the memory performance needed at the frontier of AI computing.”
For more information on Rambus HBM2 PHY offerings, please visit https://www.rambus.com/interface-ip/ddrn-phys/hbm/. Find out more details on Rambus Memory Controllers at https://www.rambus.com/interface-ip/controllers/memory-controllers/.
Also, check our primer:
HBM2E Implementation & Selection – The Ultimate Guide »
