In many cases, the cost of a DDR4 memory kit is twice what it was a year ago, but if it comes as any consolation, at least the market isn’t standing pat. Rambus, a company that is known equally well for developing memory technologies as it is for suing other firms over the use of its IP, announced that it has a functional DDR5 DIMM (dual in-line memory module) prototype.
Rambus announces industry’s first fully functional DDR5 DIMM
Specialist memory company Rambus has announced a fully functional DDR5 DIMM (dual in-line memory module) prototype. It claims to have achieved an industry first with its DIMM “capable of achieving the speeds required for the upcoming DDR5 standard”.
Rambus announces industry’s first functional silicon of server DIMM buffer chipset targeted for next-generation DDR5
Rambus Inc. has announced functional silicon of a double data rate (DDR) server DIMM (dual inline memory module) buffer chipset prototype for the next-generation DDR5 memory technology. This represents a key milestone for Rambus as the industry’s first silicon-proven memory buffer chip prototype capable of achieving the speeds required for the upcoming DDR5 standard.
DDR5 Runs in Rambus’ Labs
Rambus has working silicon in its labs for DDR5, the next major interface for DRAM dual in-line memory modules (DIMMs). The register clock drivers and data buffers could help double the throughput of main memory in servers, probably starting in 2019 — and they are already sparking a debate about the future of computing.
Rambus Announces Industry’s First Functional Silicon of Server DIMM Buffer Chipset Targeted for Next-generation DDR5
Provides data center architects early path to next-generation memory speeds
SUNNYVALE, Calif. – Sept. 20, 2017 – Rambus Inc. (NASDAQ: RMBS) today announced functional silicon of a double data rate (DDR) server DIMM (dual inline memory module) buffer chipset prototype for the next generation DDR5 memory technology. This represents a key milestone for Rambus and the industry’s first silicon-proven memory buffer chip prototype capable of achieving the speeds required for the upcoming DDR5 standard.
“Data-intensive applications like Big Data analytics and machine learning will be key drivers for the adoption of DDR5, with enterprise close behind,” said Luc Seraphin, senior vice president and general manager of the Rambus Memory and Interfaces Division. “We are proud to provide an early path to adoption with the first working buffer chip prototype running at the anticipated performance of next-generation DDR5. This demonstrates our continued dedication to be first to market and remaining on the leading edge of industry standards.”
According to JEDEC, next-generation DDR5 memory will offer improved performance and power efficiency, providing double the bandwidth and density over DDR4. With that, server DIMM chipsets, like registered clock drivers and data buffers, will be critical to enabling higher memory capacities while maintaining peak performance. This Server DIMM chip prototype leverages the signal integrity and low power, mixed-signal design expertise of Rambus to enable development of next-generation solutions for future data center workloads.
For additional information on our Server DIMM Chipsets, please visit the pages below:
1. Product Solution > DDR5 DIMM Chipset
2. Blog > DDR5 vs DDR4: All the Design Challenges & Advantages
Welcome your new Silicon Valley Chapter President, Jerome Nadel of Rambus!
Get to know your Silicon Valley Chapter President: Jerome Nadel. Jerome is the Chief Marketing Officer at Rambus and has been a CMO Club Member since July 2014. He is active in Chapter Dinners, CMO Club Summits, led CMO roundtable discussions and was a 2016 CMO Awards Finalist. You can connect with Jerome here on Twitter and LinkedIn.
