Rambus has confirmed that its recently launched 56G SerDes PHY will be developed on Samsung’s 10nm LPP (Low-Power Plus) process technology. According to Luc Seraphin,
ZDNet journalist Cho Mu-Hyun reports that Samsung has confirmed a successful network processor tape-out based on the company’s 14LPP (Low-Power Plus) process technology in close
Maintaining signal integrity has become increasingly difficult for SerDes designers at 28Gbps, 56Gbps and beyond. After nearly fifty years, NRZ technology continues to pose significant
Samsung Electronics has announced a successful network processor tape-out based on the company’s 14LPP (Low-Power Plus) process technology in close collaboration with eSilicon and Rambus.
Last week, we announced the launch of our 56G Multi-protocol SerDes (MPS) PHY developed on second-gen FinFET (Fin Field Effect Transistor) process technology. With a
Rambus has announced a 56G Multi-protocol SerDes (MPS) PHY developed on second-gen FinFET (Fin Field Effect Transistor) process technology to meet the evolving demands of
