Rambus inks license agreement with Xilinx
This entry was posted on Monday, October 3rd, 2016.
Rambus has signed a license agreement with Xilinx that covers Rambus’ patented memory controller, SerDes and security technologies.
In addition, the two companies have agreed to evaluate potential collaboration on the use of Rambus’ CryptoManager platform, with Rambus also exploring the use of Xilinx FPGAs in its Smart Data Acceleration (SDA) research program.
“As a leader in the FPGA space, Xilinx has built compelling solutions that are necessary for the growing acceleration needs in the data center,” said Rambus CEO Dr. Ron Black. “Through collaboration, we also see great potential for our CryptoManager platform to serve as the secure foundation that enables remote, dynamic activation of features once the devices are deployed in the field. We look forward to the possibilities of engaging in these programs with the Xilinx teams and providing innovative solutions to our shared customers.”
As we’ve previously discussed on Rambus Press, the CryptoManager security platform creates a trusted path from the SoC manufacturing supply chain to downstream service providers with a complete silicon-to-cloud security solution. CryptoManager includes a Security Engine, which is a flexible root-of-trust implemented as hardware or software, for secure provisioning, configuration, keying and authentication throughout the lifecycle of a device. A local and cloud-based CryptoManager Infrastructure and Trusted Provisioning Services support the Security Engine, offering chipmakers, device OEMs, secure application developers and service providers a scalable and flexible trust management solution.
Meanwhile, the SDA research program focuses on architectures designed to offload computing closer to very large data sets at multiple points in the memory and storage hierarchy. Potential use case scenarios include real-time risk analytics, ad serving, neural imaging, transcoding and genome mapping. Comprising software, firmware, FPGAs and significant amounts of DRAM, the SDA platform operates as an effective test bed for new methods of optimizing and accelerating analytics in extremely large data sets. As such, the SDA’s versatile combination of hardware, software, firmware, drivers and bit files can be precisely tweaked to facilitate architectural exploration of specific applications.
Put simply, the SDA – powered by an FPGA paired with 24 DIMMS – offers high memory densities linked to a flexible computing resource. Currently, the SDA’s base extensible command set is targeted at accelerating and offloading the transformation of common data structures such as those found in Big Data analytics applications. However, the Smart Data Acceleration platform could ultimately be made available over a network where it would serve as a key offload agent in a more disaggregated scenario.