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4Gbps！HBM2E内存接口再现性能标杆
https://www.eet-china.com/news/10020.html#new_tab人工智能/机器学习(AI/ML)在全球范围内的迅速兴起，正推动着制造业、交通、医疗、教育和金融等各个领域的惊人发展。从2012年到2019年，人工智能训练能力增长了30万倍，平均每3.43个月翻一番，就是最有力的证明。支持这一发展速度需要的远不止摩尔定律，人工智能计算机硬件和软件的各个方面都需要不断的快速改进。
Rambus Design Summit 2020
https://www.rambus.com/blogs/rambus-design-summit-2020/On October 8th, technology experts from across Rambus came together for a virtual summit to present on the selection and implementation of IP solutions for the data center, 5G/edge and IoT devices. In addition, Ed Sperling of Semiconductor Engineering and Shane Rau of IDC joined Rambus executives Neeraj Paliwal, Matt Jones and John Eble for […]
HBM2E Selection and Implementation
https://go.rambus.com/hbm2e-selection-and-implementation-webinar#new_tabHBM2E DRAM is the latest generation of high bandwidth memory enabling the most advanced AI accelerators and HPC solutions. In this webinar, Rambus technology experts Frank Ferro and Joe Rodriguez discuss the selection and implementation considerations for HBM2E memory solutions. The silicon-proven Rambus interface solution consisting of integrated PHY and memory controller is covered.
AI Requires Tailored DRAM Solutions: Part 4
https://www.rambus.com/blogs/ai-requires-tailored-dram-solutions-part-4/Frank Ferro, Senior Director Product Management at Rambus, and Shane Rau, Senior Research Executive at IDC, recently hosted a webinar that explores the role of tailored DRAM solutions in advancing artificial intelligence. Part three of this four-part series touched on a wide range of topics including the impact of AI on specific hardware systems, training […]
AI Requires Tailored DRAM Solutions: Part 3
https://www.rambus.com/blogs/ai-requires-tailored-dram-solutions-part-3/Frank Ferro, Senior Director Product Management at Rambus, and Shane Rau, Senior Research Executive at IDC, recently hosted a webinar that explores the role of tailored DRAM solutions in advancing artificial intelligence. Part two of this four-part series touched on multiple topics including how AI enables useful data processing, various types of AI silicon, and […]
Rambus Demonstrates HBM2E Running at 4 Gbps: 512 GB/s per HBM2E Stack
https://www.tomshardware.com/news/rambus-demonstrates-hbm2e-running-at-4-gbps-512-gbs-per-hbm2e-stack#new_tabRambus has demonstrated that its HBM2E solution, which consists of a memory controller and a verified 1024-bit PHY, can operate at a whopping 4.0 Gbps data transfer rate per pin. The demonstration is meant to prove potential clients that the HBM2E solution can scale and offer a 25% higher peak bandwidth than is officially defined by JEDEC’s […]
Rambus Announces 2020 Design Summit
https://www.rambus.com/blogs/rambus-announces-2020-design-summit/The Rambus 2020 Design Summit kicks off on Thursday, October 08, 2020 at 09:00 AM Pacific Daylight Time. Throughout the day, our technology experts will discuss the selection and implementation of IP solutions across multiple markets such as the data center, 5G/edge and IoT devices, and AI/ML applications. Critical enabling IP that will be covered […]
Rambus Advances HBM2E Performance to 4.0 Gbps for AI/ML Training Applications
https://www.rambus.com/rambus-advances-hbm2e-performance-to-4-0-gbps-for-ai-ml-training-applications/Highlights: Fully-integrated HBM2E memory interface solution, consisting of verified PHY and controller, achieves industry’s fastest performance New benchmark in performance supports accelerators requiring terabyte-scale bandwidth for artificial intelligence/machine learning (AI/ML) training applications Partners with SK hynix and Alchip to develop 2.5D HBM2E memory system solution using TSMC N7 process and CoWoS® advanced packaging technologies Offers unrivaled […]
Rambus Design Summit
https://www.rambus.com/rambus-design-summit-2/October 8, 2020 Register Today Join us for a day of virtual sessions covering the selection and implementation of IP solutions for the data center, 5G/edge and IoT devices including advancing the performance of AI/ML applications. Connect with a community of industry experts and gain insights and practical information for the implementation of their next-generation […]
High-Performance Memory for AI/ML and HPC: Part 2
https://www.rambus.com/blogs/high-performance-memory-for-ai-ml-and-hpc-part-2/In part one of this two-part series, Semiconductor Engineering Editor in Chief Ed Sperling and Rambus Sr. Director of Product Management Frank Ferro took a closer look at the various types of memory that system designers are using to support artificial intelligence (AI), machine learning (ML), and high-performance computing (HPC) applications. In this blog post, […]
