Search Results for: IoT security

Rambus Design Summit

Virtual | July 19, 2022

Join us at Rambus Design Summit

Back for its third year, the Rambus Design Summit is a virtual conference focused on the selection and implementation of chip and IP solutions for the data center, edge, automotive and IoT devices including the acceleration and security of AI/ML applications. Hear our technology leaders give their insights on future semiconductor technologies, and explore in-depth technical presentations on critical chip and enabling IP such as DDR5, HBM3, PCIe 6.0, GDDR6, LPDDR5, CXL, and MIPI, as well as security solutions including Root of Trust, MACsec and Inline Memory Encryption.

You will also have the opportunity to get your questions answered in our live AMAs! You don’t want to miss out on this exciting event. Register today!

Countdown to RDS 2022

Days

Hours

Minutes

Seconds

Featured Speakers

Steven Woo

Fellow and Distinguished Inventor, Rambus

John Eble

VP, Product Marketing, Rambus

Justin Endo

Sales and Marketing Manager, Mixel

Frank Ferro

Sr. Director, Product Marketing, Rambus

Matt Jones

Sr. Director and GM, Rambus IP Cores

Alain Legault

VP IP Products, Hardent

Malini Narayana Moorthi

Director of Applications Engineer, Rambus IP Cores

Neeraj Paliwal

VP and GM, Rambus Security

Joe Rodriguez

Product Marketing Manager, Rambus

Vinitha Seevaratnam

Sr. Product Marketing Manager, Rambus

Ed Sperling

Editor in Chief, Semiconductor Engineering

Bart Stevens

Sr. Director of Product Management, Rambus

Gijs Willemse

Sr. Director of Product Management, Rambus

Joe Gow

Sr. Director, Product Management, Rambus

Phani Paladugu

Director, Field Applications Engineering, Rambus

Shane Rau

Research Vice President, Computing Semiconductors, IDC

Agenda

All Sessions

Interface IP Track

Security IP Track

All Sessions

Time	Session
9:00am	Keynote: Advancing Computing in the Accelerator Age Speaker: Steven Woo, Fellow and Distinguished Inventor, Rambus Abstract: Moore’s Law has been the force that has shaped the modern world enabling chips with billions of transistors. Yet today, when we need Moore’s Law more than ever, the rate of semiconductor scaling is slowing, requiring system architects to take a new approach to continue the pace of performance gains in computing. Heterogenous compute architectures with purpose-built silicon hold the key to the next great chapter of semiconductor industry as we enter the accelerator era. All Interface IP Security IP
10:00am	Memory Bandwidth for AI/ML Races Higher with HBM3 Speaker: Frank Ferro, Senior Director of Product Management, Interface IP, Rambus Abstract: With the insatiable need for higher bandwidth in state-of-the-art AI/ML training and HPC, the HBM standard has been on a rapid pace of improvement. The newly standardized HBM3 generation doubles the data rate to 6.4 Gb/s that offers up to 819 GB/s of memory bandwidth between an accelerator and a single HBM3 DRAM device. Memory interface technology expert, Frank Ferro will discuss how the Rambus 8.4 Gb/s HBM3 Memory Subsystem can provide the headroom and scalability needed for implementing state-of-the-art HBM designs. Interface IP
10:00am	Securing Data Center AI/ML Workloads Beyond Secure Boot and Authentication Speaker: Bart Stevens, Senior Director of Product Management, Security IP, Rambus Abstract: With the rising value of AI/ML spanning training and inference models, data, and the AI hardware itself, the threats from adversaries are greater than ever. As such, a security strategy for AI/ML workloads and hardware needs to offer far more than secure boot and authentication. Rambus security expert, Bart Stevens will discuss how a hardware root of trust can be the foundation for AI/ML security through defense in depth, partitioning of secure operations, and state-of-the-art protections from side channel attacks. Security IP
10:30am	Implementing CXL™ 2.0 Interconnect Solutions Speakers: Arjun Bangre, Director of Product Marketing, Interface IP, Rambus Abstract: Compute Express Link™ (CXL) has evolved rapidly since its launch in 2019 and is slated for debut in the next generation of server platforms coming later this year. While it builds on the same physical layer as PCI Express, CXL implements unique features at the controller level to enable memory cache coherency between a host and multiple types of connected devices including smart NICs, accelerators and memory expansion devices. Interface IP
10:30am	Security Solutions for a World of IoT Devices Speakers: Marcel Van Loon, Senior Principal Engineer Systems Architecture, Security IP, Rambus Abstract: With the ‘Internet of Things’ (IoT) getting more and more pervasive, an increasing number of connected things around us collect, handle and control sensitive data. The hacking of IoT devices can affect privacy, cause a loss of physical and information security, and impact availability of services. Connected devices significantly increase the attack surface of systems and networks as they potentially provide hackers a local springboard into those systems. Mass-deployed connected devices have been used to mount distributed Denial of Service attacks. IoT devices face a hard security challenge as they face high attack exposure while having limited resources to protect themselves. This session will cover the tools and solutions provided by Rambus to help protect and harden resource constrained devices from network-based attacks. Security IP
11:00am	GDDR6 Memory Enables High-Performance Inferencing Speaker: Frank Ferro, Senior Director of Product Management, Interface IP, Rambus Abstract: A rapid rise in the size and sophistication of inferencing models has necessitated increasingly powerful hardware deployed at the network edge and in the endpoint devices. To keep these inferencing processors and accelerators fed with data requires a state-of-the-art memory solution that delivers extremely high bandwidth. Frank Ferro will discuss the design and implementation considerations of GDDR6 memory subsystems to address the bandwidth needs of these next-generation inferencing engines. Interface IP
11:00am	Hardware Security: Ask Me Anything Speakers: Scott Best, Senior Technical Director of Product Management, Security IP, Rambus Bart Stevens, Senior Director of Product Management, Security IP, Rambus Gijs Willemse, Senior Director of Product Management, Security IP, Rambus Abstract: Whether it’s security technology trends, the latest cyberthreats, implementation issues or anything in between, our security experts are ready to tackle your questions in this Ask Me Anything session. Security IP
11:30am	Accelerating Data Interconnects with PCI Express™ 6.0 & 5.0 Interface IP Speaker: Arjun Bangre, Director of Product Marketing, Interface IP, Rambus Abstract: The latest generation of the PCI Express, PCIe™ 6.0, advances performance to 64 GT/s in support of advanced workloads and networking. In this presentation, interface technology expert, Arjun Bangre will discuss the changes implemented in PCI Express 6.0, such as PAM4 signaling and low-latency forward error correction (FEC). In addition, Arjun Bangre will contrast PCIe 6.0 and 5.0 and explain how Rambus can support the PCIe interface your next design requires. Interface IP
12:00pm	LPDDR5 Delivers High Bandwidth for a Growing Range of Applications Speaker: Brian Daellenbach, Senior Director of Digital Controllers, Interface IP, Rambus Chris Browy, Vice President of Sales and Marketing, Avery Design Systems Abstract: Initially designed for mobile phones and laptops, the bandwidth and low power characteristics of LPDDR make it an increasingly attractive choice of memory for applications in IoT, automotive, edge computing and the data center. Fifth-generation LPDDR5 raises data rates to 6.4 Gbps and bandwidth to 12.8 GB/s for a x16 DRAM device. In this session, Brian Daellenbach will discuss how the flexible and highly configurable Rambus LPDDR5 controller can be implemented for a growing range of applications. Chris Browy from Avery will join Brian to cover verification (VIP) solutions for LPDDR5 designs. Interface IP
12:00pm	Securing Data in Motion with Hardware Security Engines Speaker: Gijs Willemse, Senior Director of Product Management, Security IP, Rambus Abstract: In modern communication networks, and especially moving to zero trust environments, all communication channels, including local memory interfaces must be secured. Hardware acceleration is essential to ensure the impact on performance, latency and power consumption is minimal and fundamental system operation is not degraded by the addition of security overhead. Gijs Willemse will discuss the architectural advantages, and in many use cases the necessity, for hardware-based encryption engines. Security IP
12:30pm	High-Speed Interface Solutions for 5G Speaker: Frank Ferro, Senior Director of Product Management, Interface IP, Rambus Abstract: A rapid rise in the size and sophistication of inferencing models has necessitated increasingly powerful hardware deployed at the network edge and in the endpoint devices. To keep these inferencing processors and accelerators fed with data requires a state-of-the-art memory solution that delivers extremely high bandwidth. Frank Ferro will discuss the design and implementation considerations of GDDR6 memory subsystems to address the bandwidth needs of these next-generation inferencing engines. (JESD/CIPRI). Interface IP
12:30pm	The Growing Importance of Network Security at Full Line-rate with IPsec and MACsec Speaker: Maxim Demchenko, Technical Director, Security IP, Rambus Abstract: Network security at full line rate became de-facto requirement across multiple markets and applications. Layer 2 (MACsec) and Layer 3 (IPsec) are becoming the predominant security protocols for safeguarding network traffic. Rambus security expert, Maxim Demchenko, will discuss the use cases and implementation of hardware-based MACsec security and trends for high-performance inline encryption. Security IP
1:00pm	High-Performance Memory: Ask Me Anything Speakers: John Eble, Vice President of Product Marketing, Memory Interface Chips, Rambus Frank Ferro, Senior Director of Product Management, Interface IP, Rambus Steven Woo, Fellow and Distinguished Inventor, Rambus Abstract: With high-performance memory experts covering architecture, chips and IP, we’re looking forward to your questions. Please join us for this Ask Me Anything session to get the latest on technology and trends for the world’s highest bandwidth memory solutions including DDR5, HBM3 and GDDR6. Interface IP
1:00pm	Building Trust Through Certification of Security Solutions Speaker: Stuart Kincaid, Senior Manager System Architecture, Security IP, Rambus Abstract: Certification is increasingly important across many vertical markets and, as systems become more integrated, across sectors. It is critical to trust the products you deploy and that they comply with international standards. Certification is a recognised and established methodology, and Stuart Kincaid will discuss the importance and methods of certifying security solutions to meet the increasing demand for trust. Security IP
1:30pm	Securing the Semiconductor Supply Chain with Silicon Provisioning and Cloud Key Management Speaker: Joseph Gow, Senior Director of Product Management, Security IP, Rambus Abstract: The semiconductor industry is the lifeblood of the digital economy. The design, manufacturing and consumption of chips is a global ecosystem, and competition is fierce as scaling and cost reductions based on Moore’s law are diminishing. Counterfeit and other unauthorized chips create real risks in areas of reliability, functionality, performance and safety. Joseph Gow will discuss how semiconductor companies can protect their IP and business by securely provisioning silicon, and the means to provide the ecosystem-wide capabilities needed to verify the identity and provenance of semiconductor devices. Security IP
2:00pm	MIPI® Sensor Solutions for Autonomous Driving Speakers: Joe Rodriguez, Product Marketing Manager Digital Controllers, Interface IP, Rambus Justin Endo, Sales and Marketing Manager, Mixel Abstract: Sensors drive the algorithms that interpret the data enabling ADAS driving systems. High bandwidth global shutter cameras, and low-latency, low-power radar, lidar and sonar sensors’ streaming data leverage MIPI CSI-2® technologies to meet challenging design requirements. This session will discuss how highly configurable MIPI CSI-2 based PHY and Controller sub-system solutions can be tailored to address the needs of autonomous driving. Example customer use cases will illustrate the implementation of these MIPI CSI-2 solutions. Interface IP
2:00pm	Memory Encryption Solutions for Protecting Data in Use Speakers: Scott Best, Senior Technical Director of Product Management, Security IP, Rambus Abstract: There are many challenges to achieving good “memory security,” especially in that the term “memory” could refer to on-chip SRAM, embedded non-volatile memory, or even off-chip memory (e.g., both DRAM or mass-storage non-volatile). We refer to data within non-executable NVM to be “data at rest,” while data within volatile memory like SRAM or DRAM to be “data in use.” In both domains, data within these memories is of interest to an adversary – it has either immediate value (e.g., passwords, secret keys, AI/ML datasets, etc.), or it can indirectly lead to exposure of those valuable assets. This presentation will focus on the key aspects of memory security for data-in-use applications: 1) data privacy, 2) data authenticity, and 3) data freshness, and how those security aspects weigh against critical performance metrics including latency and memory overhead. Security IP
2:30pm	DDR5 Memory Enables Next-Generation Servers Speaker: John Eble, Vice President of Product Marketing, Memory Interface Chips, Rambus Abstract: An exponential rise in data volume, and the rapid increase of advanced workloads like AI/ML training, requires constant innovation in all aspects of computing. Yet given the broad infrastructure implications, main memory technology changes infrequently, once every 6 or 7 years. The transition to DDR5 is a watershed industry event as it will be the main memory solution in servers for the rest of this decade. Interface IP
2:30pm	Automotive Security: Navigating the Intersection of Safety and Security Speaker: Thierry Kouthon, Principal Engineer, Product Management, Security IP, Rambus Ann Keffer, Product Marketing Manager, Siemens EDA Abstract: Vehicle systems and the semiconductors used within them are some of the most complex electronics seen today. Ensuring these systems are both functionally safe and secure from cyberattacks is mission critical. Join us for this presentation where Thierry Kouthon of Rambus, and Ann Keffer of Siemens EDA will discuss hardware solutions for securing automotive electronics and how functional safety tools from Siemens can help ensure these solutions meet the requirements of ISO 26262. Security IP
3:00pm	Data Center Roundtable: The Future of the Data Center SpeakerS: John Eble, Vice President of Product Marketing, Memory Interface Chips, Rambus Matt Jones, Vice President of Strategic Marketing, Rambus Mark Orthodoxou, Vice President of Strategic Marketing, CXL Solutions, Rambus Neeraj Paliwal, General Manager, Security IP, Rambus Steven Woo, Fellow and Distinguished Inventor, Rambus Abstract: The world’s connectivity continues to increase, and the importance of digital data continues to grow. The unprecedented rise in data volumes is matched in importance by the value being extracted from this data. Server and data center architectures are evolving in response to the growing volume and importance of digital data, and greater intelligence is moving to the edge of the network and to the end points themselves. Our Rambus panel of technology experts will discuss the trends and challenges for future data centers in moving data faster and safer. All Interface IP Security IP

Interface IP Track

Time	Session
9:00am	Keynote: Advancing Computing in the Accelerator Age Speaker: Steven Woo, Fellow and Distinguished Inventor, Rambus Abstract: Moore’s Law has been the force that has shaped the modern world enabling chips with billions of transistors. Yet today, when we need Moore’s Law more than ever, the rate of semiconductor scaling is slowing, requiring system architects to take a new approach to continue the pace of performance gains in computing. Heterogenous compute architectures with purpose-built silicon hold the key to the next great chapter of semiconductor industry as we enter the accelerator era.
10:00am	Memory Bandwidth for AI/ML Races Higher with HBM3 Speaker: Frank Ferro, Senior Director of Product Management, Interface IP, Rambus Abstract: With the insatiable need for higher bandwidth in state-of-the-art AI/ML training and HPC, the HBM standard has been on a rapid pace of improvement. The newly standardized HBM3 generation doubles the data rate to 6.4 Gb/s that offers up to 819 GB/s of memory bandwidth between an accelerator and a single HBM3 DRAM device. Memory interface technology expert, Frank Ferro will discuss how the Rambus 8.4 Gb/s HBM3 Memory Subsystem can provide the headroom and scalability needed for implementing state-of-the-art HBM designs.
10:30am	Implementing CXL™ 2.0 Interconnect Solutions Speakers: Arjun Bangre, Director of Product Marketing, Interface IP, Rambus Abstract: Compute Express Link™ (CXL) has evolved rapidly since its launch in 2019 and is slated for debut in the next generation of server platforms coming later this year. While it builds on the same physical layer as PCI Express, CXL implements unique features at the controller level to enable memory cache coherency between a host and multiple types of connected devices including smart NICs, accelerators and memory expansion devices.
11:00am	GDDR6 Memory Enables High-Performance Inferencing Speaker: Frank Ferro, Senior Director of Product Management, Interface IP, Rambus Abstract: A rapid rise in the size and sophistication of inferencing models has necessitated increasingly powerful hardware deployed at the network edge and in the endpoint devices. To keep these inferencing processors and accelerators fed with data requires a state-of-the-art memory solution that delivers extremely high bandwidth. Frank Ferro will discuss the design and implementation considerations of GDDR6 memory subsystems to address the bandwidth needs of these next-generation inferencing engines.
11:30am	Accelerating Data Interconnects with PCI Express™ 6.0 & 5.0 Interface IP Speaker: Arjun Bangre, Director of Product Marketing, Interface IP, Rambus Abstract: The latest generation of the PCI Express, PCIe™ 6.0, advances performance to 64 GT/s in support of advanced workloads and networking. In this presentation, interface technology expert, Arjun Bangre will discuss the changes implemented in PCI Express 6.0, such as PAM4 signaling and low-latency forward error correction (FEC). In addition, Arjun Bangre will contrast PCIe 6.0 and 5.0 and explain how Rambus can support the PCIe interface your next design requires.
12:00pm	LPDDR5 Delivers High Bandwidth for a Growing Range of Applications Speaker: Brian Daellenbach, Senior Director of Digital Controllers, Interface IP, Rambus Chris Browy, Vice President of Sales and Marketing, Avery Design Systems Abstract: Initially designed for mobile phones and laptops, the bandwidth and low power characteristics of LPDDR make it an increasingly attractive choice of memory for applications in IoT, automotive, edge computing and the data center. Fifth-generation LPDDR5 raises data rates to 6.4 Gbps and bandwidth to 12.8 GB/s for a x16 DRAM device. In this session, Brian Daellenbach will discuss how the flexible and highly configurable Rambus LPDDR5 controller can be implemented for a growing range of applications. Chris Browy from Avery will join Brian to cover verification (VIP) solutions for LPDDR5 designs.
12:30pm	High-Speed Interface Solutions for 5G Speaker: Frank Ferro, Senior Director of Product Management, Interface IP, Rambus Abstract: A rapid rise in the size and sophistication of inferencing models has necessitated increasingly powerful hardware deployed at the network edge and in the endpoint devices. To keep these inferencing processors and accelerators fed with data requires a state-of-the-art memory solution that delivers extremely high bandwidth. Frank Ferro will discuss the design and implementation considerations of GDDR6 memory subsystems to address the bandwidth needs of these next-generation inferencing engines. (JESD/CIPRI).
1:00pm	High-Performance Memory: Ask Me Anything Speaker: John Eble, Vice President of Product Marketing, Memory Interface Chips, Rambus Frank Ferro, Senior Director of Product Management, Interface IP, Rambus Steven Woo, Fellow and Distinguished Inventor, Rambus Abstract: With high-performance memory experts covering architecture, chips and IP, we’re looking forward to your questions. Please join us for this Ask Me Anything session to get the latest on technology and trends for the world’s highest bandwidth memory solutions including DDR5, HBM3 and GDDR6.
2:00pm	MIPI® Sensor Solutions for Autonomous Driving Speakers: Joe Rodriguez, Product Marketing Manager Digital Controllers, Interface IP, Rambus Justin Endo, Sales and Marketing Manager, Mixel Abstract: Sensors drive the algorithms that interpret the data enabling ADAS driving systems. High bandwidth global shutter cameras, and low-latency, low-power radar, lidar and sonar sensors’ streaming data leverage MIPI CSI-2® technologies to meet challenging design requirements. This session will discuss how highly configurable MIPI CSI-2 based PHY and Controller sub-system solutions can be tailored to address the needs of autonomous driving. Example customer use cases will illustrate the implementation of these MIPI CSI-2 solutions.
2:30pm	DDR5 Memory Enables Next-Generation Servers Speaker: John Eble, Vice President of Product Marketing, Memory Interface Chips, Rambus Abstract: An exponential rise in data volume, and the rapid increase of advanced workloads like AI/ML training, requires constant innovation in all aspects of computing. Yet given the broad infrastructure implications, main memory technology changes infrequently, once every 6 or 7 years. The transition to DDR5 is a watershed industry event as it will be the main memory solution in servers for the rest of this decade.
3:00pm	Data Center Roundtable: The Future of the Data Center Speaker: John Eble, Vice President of Product Marketing, Memory Interface Chips, Rambus Matt Jones, Vice President of Strategic Marketing, Rambus Mark Orthodoxou, Vice President of Strategic Marketing, CXL Solutions, Rambus Neeraj Paliwal, General Manager, Security IP, Rambus Steven Woo, Fellow and Distinguished Inventor, Rambus Abstract: The world’s connectivity continues to increase, and the importance of digital data continues to grow. The unprecedented rise in data volumes is matched in importance by the value being extracted from this data. Server and data center architectures are evolving in response to the growing volume and importance of digital data, and greater intelligence is moving to the edge of the network and to the end points themselves. Our Rambus panel of technology experts will discuss the trends and challenges for future data centers in moving data faster and safer.

Security IP Track

Time	Session
9:00am	Keynote: Advancing Computing in the Accelerator Age Speaker: Steven Woo, Fellow and Distinguished Inventor, Rambus Abstract: Moore’s Law has been the force that has shaped the modern world enabling chips with billions of transistors. Yet today, when we need Moore’s Law more than ever, the rate of semiconductor scaling is slowing, requiring system architects to take a new approach to continue the pace of performance gains in computing. Heterogenous compute architectures with purpose-built silicon hold the key to the next great chapter of semiconductor industry as we enter the accelerator era.
10:00am	Securing Data Center AI/ML Workloads Beyond Secure Boot and Authentication Speaker: Bart Stevens, Senior Director of Product Management, Security IP, Rambus Abstract: With the rising value of AI/ML spanning training and inference models, data, and the AI hardware itself, the threats from adversaries are greater than ever. As such, a security strategy for AI/ML workloads and hardware needs to offer far more than secure boot and authentication. Rambus security expert, Bart Stevens will discuss how a hardware root of trust can be the foundation for AI/ML security through defense in depth, partitioning of secure operations, and state-of-the-art protections from side channel attacks.
10:30am	Security Solutions for a World of IoT Devices Speakers: Marcel Van Loon, Senior Principal Engineer Systems Architecture, Security IP, Rambus Abstract: With the ‘Internet of Things’ (IoT) getting more and more pervasive, an increasing number of connected things around us collect, handle and control sensitive data. The hacking of IoT devices can affect privacy, cause a loss of physical and information security, and impact availability of services. Connected devices significantly increase the attack surface of systems and networks as they potentially provide hackers a local springboard into those systems. Mass-deployed connected devices have been used to mount distributed Denial of Service attacks. IoT devices face a hard security challenge as they face high attack exposure while having limited resources to protect themselves. This session will cover the tools and solutions provided by Rambus to help protect and harden resource constrained devices from network-based attacks.
11:00am	Hardware Security: Ask Me Anything Speaker: Scott Best, Senior Technical Director of Product Management, Security IP, Rambus Bart Stevens, Senior Director of Product Management, Security IP, Rambus Gijs Willemse, Senior Director of Product Management, Security IP, Rambus Abstract: Whether it’s security technology trends, the latest cyberthreats, implementation issues or anything in between, our security experts are ready to tackle your questions in this Ask Me Anything session.
12:00pm	Securing Data in Motion with Hardware Security Engines Speaker: Gijs Willemse, Senior Director of Product Management, Security IP, Rambus Abstract: In modern communication networks, and especially moving to zero trust environments, all communication channels, including local memory interfaces must be secured. Hardware acceleration is essential to ensure the impact on performance, latency and power consumption is minimal and fundamental system operation is not degraded by the addition of security overhead. Gijs Willemse will discuss the architectural advantages, and in many use cases the necessity, for hardware-based encryption engines.
12:30pm	The Growing Importance of Network Security at Full Line-rate with IPsec and MACsec Speaker: Maxim Demchenko, Technical Director, Security IP, Rambus Abstract: Network security at full line rate became de-facto requirement across multiple markets and applications. Layer 2 (MACsec) and Layer 3 (IPsec) are becoming the predominant security protocols for safeguarding network traffic. Rambus security expert, Maxim Demchenko, will discuss the use cases and implementation of hardware-based MACsec security and trends for high-performance inline encryption.
1:00pm	Building Trust Through Certification of Security Solutions Speaker: Stuart Kincaid, Senior Manager System Architecture, Security IP, Rambus Abstract: Certification is increasingly important across many vertical markets and, as systems become more integrated, across sectors. It is critical to trust the products you deploy and that they comply with international standards. Certification is a recognised and established methodology, and Stuart Kincaid will discuss the importance and methods of certifying security solutions to meet the increasing demand for trust.
1:30pm	Securing the Semiconductor Supply Chain with Silicon Provisioning and Cloud Key Management Speaker: Joseph Gow, Senior Director of Product Management, Security IP, Rambus Abstract: The semiconductor industry is the lifeblood of the digital economy. The design, manufacturing and consumption of chips is a global ecosystem, and competition is fierce as scaling and cost reductions based on Moore’s law are diminishing. Counterfeit and other unauthorized chips create real risks in areas of reliability, functionality, performance and safety. Joseph Gow will discuss how semiconductor companies can protect their IP and business by securely provisioning silicon, and the means to provide the ecosystem-wide capabilities needed to verify the identity and provenance of semiconductor devices.
2:00pm	Memory Encryption Solutions for Protecting Data in Use Speakers: Scott Best, Senior Technical Director of Product Management, Security IP, Rambus Abstract: There are many challenges to achieving good “memory security,” especially in that the term “memory” could refer to on-chip SRAM, embedded non-volatile memory, or even off-chip memory (e.g., both DRAM or mass-storage non-volatile). We refer to data within non-executable NVM to be “data at rest,” while data within volatile memory like SRAM or DRAM to be “data in use.” In both domains, data within these memories is of interest to an adversary – it has either immediate value (e.g., passwords, secret keys, AI/ML datasets, etc.), or it can indirectly lead to exposure of those valuable assets. This presentation will focus on the key aspects of memory security for data-in-use applications: 1) data privacy, 2) data authenticity, and 3) data freshness, and how those security aspects weigh against critical performance metrics including latency and memory overhead.
2:30pm	Automotive Security: Navigating the Intersection of Safety and Security Speaker: Thierry Kouthon, Principal Engineer, Product Management, Security IP, Rambus Ann Keffer, Product Marketing Manager, Siemens EDA Abstract: Vehicle systems and the semiconductors used within them are some of the most complex electronics seen today. Ensuring these systems are both functionally safe and secure from cyberattacks is mission critical. Join us for this presentation where Thierry Kouthon of Rambus, and Ann Keffer of Siemens EDA will discuss hardware solutions for securing automotive electronics and how functional safety tools from Siemens can help ensure these solutions meet the requirements of ISO 26262.
3:00pm	Data Center Roundtable: The Future of the Data Center Speaker: John Eble, Vice President of Product Marketing, Memory Interface Chips, Rambus Matt Jones, Vice President of Strategic Marketing, Rambus Mark Orthodoxou, Vice President of Strategic Marketing, CXL Solutions, Rambus Neeraj Paliwal, General Manager, Security IP, Rambus Steven Woo, Fellow and Distinguished Inventor, Rambus Abstract: The world’s connectivity continues to increase, and the importance of digital data continues to grow. The unprecedented rise in data volumes is matched in importance by the value being extracted from this data. Server and data center architectures are evolving in response to the growing volume and importance of digital data, and greater intelligence is moving to the edge of the network and to the end points themselves. Our Rambus panel of technology experts will discuss the trends and challenges for future data centers in moving data faster and safer.

Don’t miss out on the Rambus Design Summit!

What is OTA in automotive? Over the air updates explained.

Over-the-air (OTA) programming refers to the ability to download applications, services, and configurations over a mobile or cellular network. Over-the-air (OTA) programming is used to automatically update firmware, software, and even encryption keys. Specific OTA categories include:

Software over-the-air (SOTA)
Firmware-over-the-air (FOTA)
Over-the-air service provisioning (OTASP)
Over-the-air provisioning (OTAP)
Over-the-air parameter administration (OTAPA)

Here are some other subtopics we will cover in this article:

How do OTA updates work?

A device management system operated by the manufacturer issues a new software or firmware update. The update is uploaded to the cloud where it is queued, downloaded, and verified by the target device over a cellular or mobile connection. Once verified, the device typically triggers an alert that prompts the owner to approve or decline the update. After confirming approval—whether manually or automatically—the system installs the update and sends back diagnostic information to the manufacturer.

Software over-the-air updates are now quite common in the automotive market, with major vehicle manufacturers routinely rolling out SOTA upgrades for infotainment and navigation systems. SOTA can also update software controlling a vehicle’s physical components or electronic signal processing systems. In contrast to SOTA, firmware-over-the-air upgrades have only been implemented at scale by a small number of automotive manufacturers, including Tesla and NIO. This is because FOTA updates typically demand more computing power, faster mobile connections, and higher levels of security.

Most automakers are already designing vehicle hardware to support software updates. This enables manufacturers to shift to a revenue model that is based on services—rather than a one-time sale of a car or truck. According to Gartner analysts, half of the top 10 global automakers will offer unlocks and capability upgrades via software updates by 2023. It should be noted that Tesla began monetizing OTA upgrades in 2019 when it offered Model 3 owners an acceleration boost—from 4.6s to 4.1s—for $3,000.

How do connected cars get updates?

Most cars with infotainment systems can receive software updates. Some automotive operating systems, such as BMW’s OS 7/8, Mercedes MBUX, and Tesla, continuously scan for OTA updates in the cloud. Once identified, the update is downloaded, verified, and run by the telematics control unit (TCU) of a connected vehicle.

TCUs wirelessly connect cars and trucks to cloud services and other vehicles with V2X standards over a cellular network (4G/5G). The TCU also collects essential vehicle telemetry data, including geographical position, speed, vector, engine information, and connectivity strength.

Why would my car need a software OTA update?

OTA updates—which improve the driving experience and create safer roads—are delivered remotely and do not require a trip to a dealership or mechanic. These updates can be grouped into two primary categories: infotainment and drive control.

Infotainment updates refresh map information, upgrade audio capabilities, and optimize user interfaces, streaming services, and apps. Although infotainment updates significantly improve the in-car experience, they are not mission-critical.

In contrast, drive control OTA updates directly affect the ability of a vehicle to operate safely and efficiently. These updates typically include system enhancements or fixes for powertrain systems, chassis systems, brakes, and advanced driver assistance systems (ADAS). Drive control OTA updates—which may also improve range and charging for electric vehicles (EVs)—are generally considered critical or required.

Most automakers have already updated new vehicle hardware to support software updates. For example, Tesla pre-designs hardware and software to accommodate future function expansion requirements. New functions, along with full lifecycle updates, are introduced at a steady cadence via software upgrades.

How to address over-the-air automotive security challenges?

Unsecured automotive over-the-air updates are susceptible to multiple threats and attacks such as spoofing, tampering, repudiation, escalation of privileges, and information leakage. These threats can be mitigated by encrypting software updates; using a signed certificate containing the public key of the entity requesting the update; digitally signing updates after encryption; securing all network transactions with TLS public key authentication (signed by a trusted Certificate Authority); and (clients) performing hostname verification to ensure they are connecting a verified server.

Additional mitigation techniques include only delivering updates to authorized devices; the tamper-proof logging of all important events; the initialization of SOTA/FOTA updates with a secure boot mechanism; software update systems that are designed to “fail gracefully” in the case of a denial-of-service (DoS) attack; the utilization of anti-malware protection such as whitelists and in-memory protection; and ensuring that compliant SOTA/FOTA software update systems clear all shared resources of sensitive data and keys that were temporarily stored during software updates.

In addition to the above guidelines, the National Highway Traffic Safety Administration (NHTSA) has published official OTA update recommendations in its “Cybersecurity Best Practices for the Safety of Modern Vehicles” report. According to the NHTSA, vehicle manufacturers should:

Maintain the integrity of OTA updates, update servers, the transmission mechanisms, and the updating process in general.
Take into account, when designing security measures, the risks associated with compromised servers, insider threats, men-in-the-middle attacks, and protocol vulnerabilities.

What company makes the security technology for OTA updates?

Rambus automotive embedded hardware security modules (HSMs) can help manufacturers adhere to the NHTSA’s recommendations. In addition to securing SOTA/FOTA upgrades, these HSMs provide secure boot, secure debug capabilities, and work with other security functions such as MACsec, IPsec, and TLS embedded protocol engines to protect network traffic in cars. To operate properly, components such as electronic control units (ECUs) and other systems must run the manufacturer intended firmware—without tampering. A root of trust ensures firmware is valid and can be securely updated when needed.

Rambus offers embedded HSM (root of trust) variants for both ASIL-B (RT-640) and ASIL-D (RT-645) that are specifically designed for the functional safety requirements of ISO 26262, an international automotive electronics system standard. The Rambus RT-640 Embedded HSM recently received Automotive Safety Integrity Level B (ASIL-B) ISO 26262 certification. Certified ASIL-B compliance is a critical requirement for automotive manufacturers and their suppliers to ensure vehicle systems meet necessary safety levels. Integrated into an automotive SoC, the ASIL-B certified RT-640 silicon IP design provides powerful cryptographic functions, state-of-the-art safety mechanisms, and anti-tamper technologies to protect critical automotive electronics and data.

From a holistic perspective, Rambus end-to-end security solutions comprise a tightly integrated ecosystem that enables simple, rapid, and secure integration into automotive supply chains. Chips and devices can be securely provisioned at the time of manufacture with CryptoManager Provisioning and securely managed through cloud-based services over the entire lifetime of a vehicle. The cloud-based Rambus CryptoManager Device Key Management platform also enables automakers and partners to deliver Feature-as-a-Service (FaaS) by leveraging provisioned cryptographic keys and identities.

Additional Resources:

– Other blogs around Over-The-Air updates (OTA):
1. Securing connected vehicles with Rambus CryptoManager
2. Securing intelligent transportation systems
3. How not to get pwned @ automotive cyber-security
4. Securing chips for the IoT
5. Mitigating DDoS attacks with secure IoT endpoints
6. The challenge of securing smart homes
7. Hack the planet: Security concerns about the IoT

– White Paper: Navigating the Intersection of Safety and Security

– Market page: Automotive Solutions

– Products for Automotive Applications:

Rambus Delivers PCIe 6.0 Controller for Next-Generation Data Centers

Highlights:

Pushes performance to 64 GT/s for advanced AI/ML, storage and networking applications
Implements full PCIe 6.0 feature set with optimized power, area and latency
Offers state-of-the-art data security with integrated IDE engine

Rambus PCIe 6.0 Controller Block Diagram

SAN JOSE, Calif. – Jan. 26, 2022 – Rambus Inc. (NASDAQ: RMBS), a premier chip and silicon IP provider making data faster and safer, today announced the availability of its PCI Express® (PCIe®) 6.0 Controller. The PCIe specification is the interconnect of choice across a broad landscape of data-intensive markets including data center, AI/ML, HPC, automotive, IoT, defense and aerospace. Optimized for power, area and latency, the Rambus PCIe 6.0 controller delivers data rates up to 64 Gigatransfers per second (GT/s) for high-performance applications. In addition, the controller provides state-of-the-art security with an Integrity and Data Encryption (IDE) engine that monitors and protects PCIe links against physical attacks.

“The rapid advancement of AI/ML and data-intensive workloads requires that we continue to provide higher data rate solutions with best-in-class latency, power and area,” said Sean Fan, chief operating officer at Rambus. “As the latest addition to our portfolio of industry-leading interface IP, our PCIe 6.0 Controller offers customers an easy to integrate solution that delivers both performance and security for advanced SoCs and FPGAs.”

Key features of the Rambus PCIe 6.0 Controller include:

Supports PCIe 6.0 specification including 64 GT/s data rate and PAM4 signaling
Supports fixed-sized FLITs that enable high-bandwidth efficiency
Implements low-latency Forward Error Correction (FEC) for link robustness
Internal data path size automatically scales up or down based on max. link speed and width for reduced gate count and optimal throughput
Backward compatible to PCIe 5.0, 4.0 and 3.0/3.1
Supports Endpoint, Root-Port, Dual-Mode and Switch port configurations
Integrated IDE optimized for performance

More Information:
For more information on the PCIe 6.0 Controller, please visit our website. Or, view the PCIe 6.0 specification online.

Rambus Design Summit

June 23 – 24, 2021

Join technology experts from Rambus and our partners for two days of webinars and panels covering the selection and implementation of IP solutions for the data center, 5G/edge and IoT devices including accelerating and securing AI/ML applications. Critical enabling IP including HBM2E, GDDR6, PCIe 5.0 and MIPI interfaces as well as Root of Trust and network security protocol engines will be covered.

Rambus fellow, Dr. Steven Woo, will keynote the conference with an exploration of technologies that will shape the future evolution of the data center.