Ted Harrington, partner at Independent Security Evaluators and organizer of the annual DEFCON hacker conference, is not at all optimistic about a secure IoT. As Harrington tells Inverse, IoT security “will get worse, potentially a lot worse, before it gets better.”
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DEFCON organizer talks IoT security
Ted Harrington, partner at Independent Security Evaluators and organizer of the annual DEFCON hacker conference, is not at all optimistic about a secure IoT. As Harrington tells Inverse, IoT security “will get worse, potentially a lot worse, before it gets better.”
According to Harrington, new technology typically follows three predictable steps: Innovation, (similar) products that hit the marketplace without proper security, and pressure from the community to tighten up security.
“We are at the very, very, very front edge of that second phase,” Harrington opined. “We have a long way to go before we get to the third phase.”
To be sure, he says, the current trust model for the IoT is broken.
“Meaning, connected devices inherently trust each other, when in fact they should inherently distrust each other,” he explained. “Don’t get lost in the hype with how exciting IoT is without balancing it with the risk that comes along with IoT.”
Paul Kocher, the Chief Scientist of Rambus’ Cryptography Research Division, expressed similar sentiments during a recent panel about securing the Internet of Things (IoT).
“Today we have a plethora of devices with multiple functions and features,” he explained. “This complexity means bugs are being created far faster than they are being fixed. In addition, more devices means an increased number of targets, while more information [stored or collected on IoT devices or endpoints] offers greater rewards to hackers.”
According to Kocher, security is not always something people are willing to pay for. Nevertheless, the progression of Moore’s Law is helping to reduce costs from dollars to pennies. In addition, says the chief scientist, the Federal Trade Commission (FTC) has increased its scrutiny of consumer-related hacks, while a more stringent level of security is required for certain government applications and equipment.
“Ultimately, IoT security will enter a stage of maturity and responsibility,” Kocher opined. “In the meantime, we are experiencing growing pains, much like the aviation and pharmaceutical industries did before an increase in both collaboration and regulation. This approach has to change at some point, but the question is how bad does it have to get before people really care.”
Kocher goes on to state that what is needed now is to avoid situations where vulnerable products are deployed in the field for 10-15 years or more – at which point they may no longer be supported by belated software security patches. Indeed, as Kocher noted earlier, numerous companies are still routinely “checking the security box” to expedite the process of launching a new product.
“They want the least intrusive, least comprehensive evaluation possible. And then there are companies that have been hacked that want to understand their risk and mitigate it,” he added. “If you get check boxes without teeth behind the consequences, it doesn’t help. If you can get liability and skin in the game for companies that control the risk, it would be transformative.”
IoT on the edge
McObject CEO Steve Graves recently noted that there is little industry discussion about data management on so-called edge nodes comprising the Internet of Things (IoT). “A vast number of edge devices will need to store, retrieve and analyze some data right where they sit, before shipping anything ‘upstream’ to gateway or server-based data aggregation points that we usually think of in connection with Big Data,” Graves explained in a blog post published in Embedded Design.
IoT on the edge
McObject CEO Steve Graves recently noted that there is little industry discussion about data management on so-called edge nodes comprising the Internet of Things (IoT).
“A vast number of edge devices will need to store, retrieve and analyze some data right where they sit, before shipping anything ‘upstream’ to gateway or server-based data aggregation points that we usually think of in connection with Big Data,” Graves explained in a blog post published in Embedded Design.
“These data-crunching edge devices are more interesting ‘things’ that, in and of themselves, provide value to their users. These things ingest and produce a respectable amount of data that must be managed on the device, before it ever becomes part of Big Data (Cloud-based or otherwise).”
Paul Karazuba, a Director of Product Marketing at Rambus, concurred with Graves’ assessment.
“Just because we are approaching the age of the IoT and ‘always-on’ connectivity doesn’t mean that there won’t occasionally be connectivity outages. Even downtime of 30 seconds can cause severe issues in many applications,” said Karazuba. “When we are talking about a smart homes and smart buildings, it is clear that lights need to go on even when the Internet is down. Therefore, edge nodes such as sensors must have minimal processing and analytical capabilities at the local level.”
According to Karazuba, this is precisely why Rambus lensless smart sensor (LSS) technology offers a new approach to optical sensing – delivering on package, power and price by replacing traditional lenses with tiny diffractive optics.
“LSS enables the next-generation of low-power sensing through capturing information-rich data using a low-cost phase grating coupled with standard image sensors and sophisticated computational algorithms,” he continued. “More specifically, the spiral grating of LSS diffractive optics (hardware), coupled with sophisticated computational algorithms (software), reduce computation time while facilitating application-specific design flexibility. This allows computation to be performed on the LSS sensors themselves.”
As thin as 1 millimeter thick for a grating and a sensor, LSS technology is small enough to integrate directly into existing devices and applications to enable accurate sensing capabilities that are virtually invisible to the end user.
“Applications such as digital eyewear and smart home sensing can greatly benefit from its tiny size, by embedding LSS into the frames of digital eyewear for eye tracking or a smart LED light bulb for motion detection and occupancy sensing,” Karazuba added. “Rambus LSS technology offers the potential to positively disrupt the future of smart buildings, consumer devices, automobiles, and other connected applications.”
Architecting new memory for the IoT
The once indefatigable Moore’s Law is beginning to slow, even as data, driven by a burgeoning Internet of Things (IoT), continues to increase exponentially. Consequently, a slew of new memory architectures, including those utilizing 2.5D and 3D packaging, are evolving to meet the demands of a new digital age.
Architecting new memory for the IoT
The once indefatigable Moore’s Law is beginning to slow, even as data, driven by a burgeoning Internet of Things (IoT), continues to increase exponentially. Consequently, a slew of new memory architectures, including those utilizing 2.5D and 3D packaging, are evolving to meet the demands of a new digital age.
Nevertheless, As Ed Sperling of Semiconductor Engineering recently pointed out, there are still more questions than answers about the future of memory, perhaps due to the salient lack of an obvious successor to DDR4.
“[It is unclear] which type of memories to use for what, how they should be packaged and used, and how those new memories will impact data storage further downstream at the disk level,” he explained. “What comes next may be a new memory type, or it may be a new architectural approach using the same technology [as DRAM].”
According to Frank Ferro, a Senior Director of Product Management at Rambus, potential solutions and directions for a beyond DDR4 paradigm includes leveraging existing memory system I/O and architectures to support higher frequencies and multiple memory types on the DDR channel.
“The next generation memory needs to consider advanced I/O techniques; new data bus topologies and the use of improved, lower swing, power efficient, single-ended signaling to reduce bottlenecks,” he said.
Rambus, notes Ferro, already has a prototype memory interface system running at 6.4Gbps (@2 DIMMs per channel), which is more than 2x existing DDR4 data rates. “By doubling the speed of the memory interface and increasing DIMM performance, Rambus has demonstrated that there still is strong roadmap for traditional DDR interfaces.”
In addition, Rambus continues to actively participate in industry conversations about various trends, such as 2.5D/3D packaging and high bandwidth memory (HBM), the latter of which stacks up to 8-DRAM dies.
“From our perspective, 2.5D and 3D packaging is primarily being driven by HBM, which is designed for use in server and network devices,” Ferro explained. “At this point in time, the cost-benefit of HBM varies based on specific use cases, such as those that demand higher DRAM density.”
In turn, says Ferro, HBM is being driven by an insatiable need for more bandwidth by bringing to memory closer to the processor.
“The maximum speed for HBM is 2Gbits/s per pin – for a total bandwidth of 256Gbytes/s,” he confirmed. “And while the bit rate may be somewhat similar to DDR3 at 2.1Gbps, the 8, 128-bit channels gives HBM approximately 15x more bandwidth.”
As Ferro emphasizes, HBM design and implementation can also be challenging, as 2.5D-packaging technology inevitably adds various manufacturing complexities, along with silicon interposer costs.
“There are numerous expensive components mounted to the interposer, such as the SoC and multiple HBM devices,” said Ferro. “Another significant challenge involves routing thousands of signals (data + control + power/ground) via the interposer to the SOC for each HBM memory used. Therefore, a good yield is certainly a critical factor in making the system cost effective.”
Despite the above-mentioned challenges, says Ferro, HBM offers a number of distinct capabilities for a new digital age dominated by the IoT. These include moving memory closer to the CPU, while increasing both density and bandwidth.
“In short,” Ferro added, “HBM takes advantage of existing technologies to create another tier of memory, thus bolstering the overall server memory architecture. At the same time, continued enhancements are needed to the underlying memory and system topology to provide even greater performance as we look out to 2019 and beyond.”
